
dsPIC33F
DS70165E-page 192
Preliminary
2007 Microchip Technology Inc.
REGISTER 15-10: FLTBCON: FAULT B CONTROL REGISTER
R/W-0
FBOV4H
FBOV4L
FBOV3H
FBOV3L
FBOV2H
FBOV2L
FBOV1H
FBOV1L
bit 15
bit 8
R/W-0
U-0
R/W-0
FLTBM
—
—FBEN4(1)
FBEN3(1)
FBEN2(1)
FBEN1(1)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
FBOVxH<4:1>:FBOVxL<4:1>: Fault Input B PWM Override Value bits
1
= The PWM output pin is driven active on an external Fault input event
0
= The PWM output pin is driven inactive on an external Fault input event
bit 7
FLTBM: Fault B Mode bit
1
= The Fault B input pin functions in the Cycle-by-Cycle mode
0
= The Fault B input pin latches all control pins to the programmed states in FLTBCON<15:8>
bit 6-4
Unimplemented: Read as ‘0’
bit 3
FBEN4: Fault Input B Enable bit(1)
1
= PWM4H/PWM4L pin pair is controlled by Fault Input B
0
= PWM4H/PWM4L pin pair is not controlled by Fault Input B
bit 2
FBEN3: Fault Input B Enable bit(1)
1
= PWM3H/PWM3L pin pair is controlled by Fault Input B
0
= PWM3H/PWM3L pin pair is not controlled by Fault Input B
bit 1
FBEN2: Fault Input B Enable bit(1)
1
= PWM2H/PWM2L pin pair is controlled by Fault Input B
0
= PWM2H/PWM2L pin pair is not controlled by Fault Input B
bit 0
FBEN1: Fault Input B Enable bit(1)
1
= PWM1H/PWM1L pin pair is controlled by Fault Input B
0
= PWM1H/PWM1L pin pair is not controlled by Fault Input B
Note 1:
Fault A pin has priority over Fault B pin, if enabled.